1. Course Details

  • Level: Seniors and Graduates
  • Prerequisites: EECE 321 Computer Organization
  • Lecture Times:  TT 12:30 p.m. – 1:45 p.m.
  • Room: 543
  • Student Study Hours Per Week: 9
  • Contact Hours Per Week: 3
  • Private Study Hours Per Week: 6
  • AY / Semester:  2005– 2006 / Fall
  • Professor:  Dr. I. Damaj
  • Contact Details: id01@aub.edu.lb
  • Professor's Website: http://www.idamaj.net
  • Summary of Assessment Method:  2 Quiz, Assignments, and a Final
  • Textbook:Computer Architecture: A Quantitative Approach, Third Edition, Hennessy and Patterson, Morgan Kaufmann Publishers (Elsevier), 2002.
  • References: Parallel Computer Architecture: A Hardware/Software Approach, Second Edition, Culler, Singh, and Gupta, Morgan Kaufmann Publishers (Elsevier), 1999. David A. Patterson and John L. Hennessy, Computer Organization and Design: the Hardware/Software Interface, Third Edition, Morgan Kaufmann Publishers, 2004. Introduction to Parallel Processing: Algorithms and Architectures. Behrooz Parhami, Plenum 1999. Computer Architecture: From Microprocessors to Supercomputers, Oxford University Press, 2005, ISBN 0-19-515455-X

2. Catalogue Description:

A course on the principles, techniques, and trade-offs used in designing modern processor architectures. Topics include: benchmarking and performance evaluation, long-latency instruction pipelining, hardware and software techniques for exploiting instruction-level parallelism (out-of-order, speculative, and predicated instruction execution; multithreading; loop unrolling, software pipelining, and trace scheduling), high performance memory systems, and multiprocessor systems and programming.

3. Student Learning Outcomes:

  • Identify the basic factors affecting performance, explain the role of benchmark suites in evaluating performance, and use appropriate metrics to compare and summarize processor performance.
  • Identify how variable-latency execution units are supported in a long-latency pipeline, the hazards that arise in such pipelines, and techniques for dealing with them.
  • Define instruction-level parallelism and the different types of instruction dependencies.
  • Explain how the datapath and control structures like Tomasulo’s Algorithm support out-of-order instruction execution.
  • Identify different strategies for dynamic instruction scheduling, and explain their trade-offs, side-effects, and impact on performance.
  • Explain how various compiler techniques expose instruction-level parallelism, and measure their impact on performance and code size.
  • Explain hardware and software techniques for supporting predicated instruction execution.
  • Explain how different techniques increase the performance and bandwidth of the memory system.
  • Identify different types of multiprocessor architectures.
  • Explain the characteristics of typical multiprocessor applications.
  • Explain different cache coherency techniques.
  • Explain different inter-process communication and synchronization techniques.
  • Explain the role of parallel programming languages and parallelizing/vectorizing compilers.
  • Develop high-performance processor models using SimpleScalar, VHDL/Verilog, and/or C++.
Details Topic Chapter No. Assessment
Weeks 1 - 2 Uniprocessor performance evaluation:
Part I: Technology Trends and Performance
Part II: Performance and Cost
Week 3 - 4 Long-latency Pipelines:
Part I: Review of Instruction Pipelining
Part II: Long-latency Pipelines
Part III: Strategies for Handling Hazards in Long-Latency Pipelines
Weeks 4 - 9 Instruction-Level Parallelism and its Dynamic Exploitation:
Part I: Instruction-Level Parallelism
Part II: Dynamic Scheduling
Part III: Dynamic Loop Unrolling and Dynamic Memory Disambiguation
Part IV: Reducing Branch Costs with Dynamic Hardware Prediction
Part V: Exploiting More ILP with Multiple Instruction Issue
Part VI: Hyperthreading Technology
Part VII: Vector Processing
3 Quiz I (Week 7)
Week 10 - 11 Exploiting ILP with SW Approaches:
Part I: Basic Compiler Techniques for Exposing ILP
Part II: Static Multiple Issue
Part III: Advanced Compiler Support for Exposing and Exploiting ILP
Part IV: Hardware Support for Exposing More Parallelism at Compile Time
Week 12 High-performance Memory Systems:
Part I: Revision
Part II: Improving Cache Performance - A - Reduce the Miss Rate
Part II - B: Reduce the Miss Penalty
Part II - C: Reduce Hit Time
Part III: Memory
Week 13 - 15 Multiprocessor architectures and programming:
Part I: Road to Higher Performance
Part II: Vector and Array Processing
Part III: Shared Memory Multiprocessing
Part IV: Distributed Multicomputing
Part V: Cache Coherence Protocols
6 Quiz II (Week 14)

5. Assessment of the Course

Assignments and Term Paper 30%
Quiz I 20%
Quiz II 20%
Final 30%

[Feb 6, 2006] Assignment IV grades are out.

[Feb 4, 2006] Quiz II grades are out.

[Jan 31, 2006] Assignments grades' weights, attendance weight, Assignment IV grades, and Quiz II grades are to be announced.

[Jan 31, 2006] Assignment I, Assignment II, Assignment III, and Assignment IV (Term Paper) grades are out.

[Jan 13, 2006] Assigned problems: Ch6: 6.2, 6.4, and 6.5.

[Jan 13, 2006] Please try the following two test cases (short, long) on your Assignment #3. If your program cannot process either file, you must resubmit your assignment by 12:00 noon on Monday January 16th, 2006 to mazen@aub.edu.lb. Otherwise, your grade will reflect your unmodified assignment.

[Jan 13, 2006] The final exam is on Wednesday, 25th of January in Wing D at 3:00 p.m.. The final will be a closed book exam and to cover all of the material with a greater emphasis on chapters 5 and 6.

[Jan 13, 2006] Chapter 6: Part V is posted.

[Jan 7, 2006] An extra session is to be held on Friday 13th of January between 3:00 p.m. and 5:00 p.m. in B 537.

[Jan 7, 2006] Chapter 6: Part I, Part II, Part III, and Part IV are posted.

[Jan 7, 2006] Assigned problems: Ch5: 5.3, and 5.4

[Dec 22, 2005] Chapter 5: Modified Part II - A, Part II - B, Part II - C, and Part III are posted.

[Dec 19, 2005] Chapter 5: Part I and Part II - A are posted.

[Dec 16, 2005] Download the term paper requirements. It is due on Friday the 13th of January at 12:00 noon.

[Dec 16, 2005] Quiz II is on Thursday the12th of January 2006 in Wing D at 12:25 p.m. The material included is till the end of Chapter 4 (slides).

[Dec 16, 2005] Assigned problems: Ch4: 4.2, 4.3, 4.6, 4.8, 4.12, and 4.13

[Dec 15, 2005] Chapter 4 Part IV contents are posted.

[Dec 5, 2005] There will no class on Tuesday the 6th of December. Test reviews are to be done on Thursday the 8th of December between 2:00 p.m. and 3:00 p.m. An extra session is to be scheduled.

[Dec 5, 2005] Chapter 4 Part III contents are updated.

[Dec 2, 2005] Quiz I Grades.

[Nov 29, 2005] Download Appendix G Material on Vector Processing.

[Nov 29, 2005] Assignment 4 is problem 4.9 parts (a)-(e) (pp.381-382 of the textbook). It is due on Friday, December 9th, 2005 at 3:00 pm. Please submit your assignments to FEA Box 59.

[Nov 29, 2005] Chapter 4 material is now posted.

[Nov 15, 2005] Assignment III is posted (due Friday, November 25th, 2005 at 12:00 noon).

[Nov 15, 2005] New Chapter 3 material is now posted.

[Nov 5, 2005] Quiz I is on Friday, November 18th, 2005 at 4:30 p.m. Wing D, Bechtel. The material included is till the end of Part III - Chapter 3 (slides)

[Nov 4, 2005] Assignment 2 deadline is extended until Monday, November 14th, 2005 at 12:00 noon.

[Oct 31, 2005] Assigned problems: Ch1: 1.2, 1.3, 1.7, 1.10, 1.16, 1.17; Ch2: A.2, A.12; Ch3: 3.1, 3.2, 3.3, 3.5, 3.6, 3.7, 3.9, 3.11, 3.14, 3.15

[Oct 31, 2005] An additional part from Chapter 3 is posted.

[Oct 19, 2005] Assignment 2 is to be available on October 28, download from Dr. Saghir's Website.

[Oct 19, 2005] There will be no classes next week, normal classes will resume from Tuesday 1st of November. A makeup session is to be allocated.

[Oct 18, 2005] Chapter 3 material is now posted.

[Oct 18, 2005] Download: Scoreboard Example.

[Oct 13, 2005] Assignment I is posted (due Friday, October 28th, 2005 at 12:00 noon) ; see your group name in the groups list.

[Oct 9, 2005] Chapter 2 material is now posted.

[Oct 4, 2005] It is necessary to organize yourselves into groups of two (you will work within the same group for the rest of the semester); students who didn't set a group will be assigned one by Thursday 6th of October.

[Oct 3, 2005] Chapter 1 material is now posted.

[Sep 27, 2005] The introductory lecture material is now posted.

[Sep 26, 2005] Welcome to the course website...